Plain – VM Demystified

My VM basically have an 16 bit array of instructions and start by decoding and executing the one at index 0. We run a controlled loop executing one instruction at time. A sample C code snip is included below. Each instruction do their job and set the next ix to be used. Once the instruction is executed we return to the OS that will execute system tasks (if requested) before we continue with the next instruction. 

void vm_Execute_Instruction(VM *vm, uint32_t *ix)
 vm_Instruction Ins;
 vm_Decode_Instruction(vm, ix, &Ins);
 case Op_NOP:
   vm_Execute_NOP(vm,ix, &Ins);
 case Op_For:
   vm_Execute_For(vm,ix, &Ins);
 case Op_Assign:
   vm_Execute_Assign(vm,ix, &Ins);
 case Op_While:
   vm_Execute_While(vm,ix, &Ins);



In the case of the 32 x Servo/IO controller we will be executing a hard real-time bit-banger as a system task. The RTOS gives me yS accuracy so I can schedule a bit-bang every 0,1 ms with no problem. This gives me 10,000 Hz accuracy on all IO. In this case we do this as a priority in the main loop and only execute the VM on idle time.

Idle time means we have a defined time for a full cycle and will only be executing the VM if the cycle of system tasks are shorter than this. How this will work is that we on each cycle execute exactly one instruction – as we control the speed of everything else we basically let the VM run as fast as possible. We will be running on a 72Mhz RISC processor, so I hope for an average speed of 10,000++ VM instructions per second.

Keep in mind that the VM most of the time will be idle as the logic only respond to events – so I don’t need speed alone – I need a responsive system. Obviously we can code with ever loops if we need to, but the intention is that you respond to an event, process a bit of Logic and og idle. If we need performance we create a module in C and Control it from the VM. I am looking forward to test this and see what we actually get out on performance.

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