VM – Assign

I don’t intend to describe all instructions in detail here, but I will draft the more critical ones. Assign is one of those because it contains a small micro-VM of it’s own dealing with mathematical expressions.

The instruction format is illustrated above. It contains a standard op-code, but we now also add a rule that if Length=0x3F we fetch the real length from the 3rd entry. This is to allow larger expression tables if they are needed. The reality is that I don’t expect to see this extended format in use, but I don’t like limitations on issues like this.

The last part of the instruction is P-Code table adapted to our Plain VM. The Expression Parser have computed a list of mathematical operations that if executed in sequence top-down will provide a correct result. P1 & P2 RIX are Register IX. P1 & P2 are flags indicating if this is a Register (0 0) or a TIX ( 0 1). TIX is Temporary Index and refer to the internal, temporary stack on the Assign. TIX=0 is the same as the resulting RIX. I will dig up some old work and describe the Expression Parser next…

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